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The EV10CS140VTPY is a high speed demultiplexer providing easy interface of e2v high speed A/D converters (ADC) into Field Programmable Gate Arrays (FPGA) rated at 1/2 the speed or less of e2v’s ADCs. ThisEV10CS140VTP_AT32136 demultiplexer reduces a 10-bit data stream by 2 or 4 and is compatible with existing 10-bit ADCs from e2v or other digital high speed systems where demultiplexing is required. The EV10CS140VTPY provides identical package and pin-out as the existing e2v AT84CS001VTPY (10-bit 2.2 Gsps DMUX).

The EV10CS140VTPY offers selectable 1:2 or 1:4 demultiplexed digital LVDS outputs, staggered or simultaneous data outputs, an 11th bit (Out-of-range bit), BIST (checker pattern) and is designed on a high speed BiCMOS silicon process.


EV10CS140 documents
pdf EV10CS140 datasheet
pdf BDC checklist
pdf Board layout
pdf EV10CS140 qualification report