The EV10AS180A is a 10-bit 1.5 GSps ADC. The device includes a front-end Track and Hold stage (T/H), followed by an analog encoding stage (Analog Quantizer) which outputs analog residues resulting from analog quantization. Successive banks of latches regenerate the analog residues into logical levels before entering an error correction circuitry and a resynchronization stage followed by a DEMUX with 100Ω differential output buffers.
|QMLV part no.||Te2v part no.||Description|
|5962-1522301VXC||EV10AS180AMLG-V||LGA – Land Grid Array version without columns nor balls|
|5962-1522301VYF||EV10AS180AMGS-V||Ci-CGA package version with SCI columns|
|5962-1522301VZF||EV10AS180AMGC-V||CC-CGA package version with 6 sigma columns|