Pattern Generator function on the TS83102G0B 10-bit 2Gsps ADC

How does the pattern generator function work on the TS83102G0B
10-bit 2Gsps ADC?

The pattern generator implemented in the ADC allows
the user to check the ADC I/Os rapidly thanks to an
internally generated checker board pattern.
It can be used at any clock frequency down to 100KHz
and up to 2Gsps.
It works as follows: every new cycle each bit switches
from 0 to 1 or 1 to 0, and so on. All even bits as well
as the Out of Range bit (OR/ORB) will be at high level ("1")
on each high to low transition of the Data Ready signal.
All add bits will be at high level ("1") on each low to high
transition of the Data Ready signal.

 

	bit9	bit8	bit7	bit6	bit5	bit4	bit3	bit2	bit1	bit0
cycle N	0	1	0	1	0	1	0	1	0	1
cycle N+1	1	0	1	0	1	0	1	0	1	0
cycle N+2	0	1	0	1	0	1	0	1	0	1