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FAQs

Functions - Application

TITLE	QUESTIONS / ANSWERS Click for the answer
AT84CS001 Asynchronous Reset	When do I need to asynchronous reset the AT84CS001 1:2/4 10-bit 2.2 Gsps DMUX?
AT84AD001B, AT84AD004 Dual 8-bit ADCs output data order in interleaving mode	Is the order of acquisition of the samples out of the AT84AD001B and AT84AD004 Dual 8-bit ADCs in 1:2 DMUX and interleaving mode important?
AT84AD001B, AT84AD004 Dual 8-bit ADCs analog bandwidth in interleaving mode	What is the analog bandwidth of the AT84AD001B and AT84AD004 ADCs in interleaving modes?
High speed ADC board ground planes	Do I have separate the digital and analog ground planes on the board integrating a high speed e2v ADC ?
TS86101G2B Power-up Reset	How can I ensure the synchronization of multiple DACs?
AT84AD001B, AT84AD004 Dual 8-bit ADCs Dynamic Built-in Test	How does the dynamic Built-in Test work in the AT84AD001B, AT84AD004 dual 8-bit ADCs?
Die Junction Temperature	What is the measurement error on the die junction temperature if the supplied current differs from the one given for the diode characteristic specified in the data sheet?
AT84AD001B, AT84AD004 dual 8-bit ADCs wake-up time	What is the wake-up time of the AT84AD001B, AT84AD004 dual 8-bit ADCs?
AT84AD001B, AT84AD004 dual 8-bit ADCs interleaving mode	What are the recommended settings for the AT84AD001B, AT84AD004 dual 8-bit ADCs in interleaving mode?
AT84AD001B, AT84AD004 Dual 8-bit ADC Vtestl and VtestQ Signals	What do I have to do with Vtestl and VtestQ signals?
DR and DR/2 Mode	Can the DMUX recognize data using the falling edge of the input clock?
Decimation function	How does the decimation function on the AT84AD001B Dual 8-bit 1Gsps or the TS83102G0B 10-bit 2Gsps ADC work?
Interfacing the Dual 8-bit 1Gsps ADC with the 8-bit 1:4/1:8 DMUX	How to reduce the data output speed of the Dual 8-bit 1Gsps ADC by 1:4 or 1:8 ratio?
Pattern Generator function on the TS83102G0B 10-bit 2Gsps ADC	How does the pattern generator function work on the TS83102G0B 10-bit 2Gsps ADC?
AT84AD001 Dual 8-bit 1Gsps Timings at power up	How does the AT84AD001 dual 8-bit 1Gsps ADC behave at power up?
TS81102G0 DMUX Delay cells	What are the 2 delay cells (DMUXDelAdj and ADCDelAdj) of the TS81102G0 DMUX used for?
AT84AD001B dual 8-bit 1Gsps ADC power up/down sequence	What are the recommended power up and down sequences for the AT84AD001B Dual 8-bit 1Gsps ADC?
TS83102G0B 10-bit 2Gsps ADC SDA Function	How does the SDA function of the TS83102G0B 10-bit 2Gsps ADC work?
Reset	When is it necessary to use the reset of your devices?
Power up sequence	What is the power up sequence for e2v-Grenoble ADC + DMUX?
Power up sequence	What is the power up sequence for e2v-Grenoble ADCs?
Power down sequence	What care should be taken as concerns the power down sequence for your ADCs?
AT84CS001 Unused inputs and outputs	What do I have to do with the unused inputs and outputs of the AT84CS001 1:2/4 10-bit 2.2 Gsps DMUX?
ESD protections	What kind of ESD tests have you performed on your devices?
VEETH and VCCTH	What do VEETH and VCCTH refer to in the device pinout?

Packaging Assembly

Metal lid on the bottom of the CBGA152 package	What am I supposed to do with the metal lid on the bottom of the CBGA152 package?
CQFP196 package (TS81102G0FS DMUX)	How are the CQFP196 top lid and bottom heat spreader electrically connected?
CQFP68 package (TS8388B ADC)	How are the CQFP68 top lid and bottom heat spreader electrically connected?
CQFP 68 package material	What are the CQFP68 package material characteristics?
Pin-out	Why is the TS83102G0 Package specified as CBGA 148 although it has 152 pins?
Thermal considerations on TS83102G0B device in CBGA 152 package	Does the combo lid at the bottom of the CBGA 152 package of the TS83102G0B device participate in the thermal dissipation of the device?
Grid Array package behavior after reflow	How does a ball or column grid array package behave after PCB mounting?
TS83102G0B 10-bit 2Gsps ADC Pinout in JEDEC standard	What is the TS83102G0B 10-bit 2Gsps ADC Pinout in the JEDEC Standard?
CI-CGA Pad Layout (Pb90Sn10 columns)	What is the recommended pad layout for the CI-CGA packages (with Sn10Pb90 columns) offered with e2v Broadband Data Conversion devices?
CI-CGA Assembly Recommendations (Pb90Sn10 columns)	What is the assembly recommdentations for CI-CGA packages (with Sn10Pb90 columns) offered with e2v Broadband Data Conversion devices?
TBGA Pad Layout	What is the recommended pad layout for the TBGA packages (with Sn63Pb37 balls) offered with e2v Broadband Data Conversion devices?
CBGA Pad Layout (Sn63Pb37 balls)	What is the recommended pad layout for the CBGA packages (with Sn63Pb37 balls) offered with e2v Broadband Data Conversion devices?
Pin-out	What am I supposed to do with the unused pins of the package device?

Input/Output Interfacing

TS86101G2B AGND and DGND Ground Planes	How do I have to connect the A2 and A15 AGND pins of the TS86101G2B 4:1 10-bit 1.2 Gsps DAC?
AT84CS001 Unused inputs and outputs	What do I have to do with the unused inputs and outputs of the AT84CS001 1:2/4 10-bit 2.2 Gsps DMUX?
AT84AD001B, AT84AD004 Dual 8-bit ADC analog input channel Q unused	What do I have to do with the VINQ and VINQB signals if I do not intend to use these input signals?
AT84AD001B, AT84AD004 Dual 8-bit ADC Clock Q unused	What do I have to do with the CLOCK Q pins (CLKQ, CLKQN) if I do not intend to use them?
AT84AD001B, AT84AD004 dual 8-bit ADC maximum capacitive load allowed per output differential pair	What is the maximum capacitive load allowed on each output differential pair of the ADC?
Pin-out	What am I supposed to do with the unused pins of the package device?
AT84AD001 Dual 8-bit 1Gsps ADC Input Clock implementation in Single-ended mode	What is the recommended termination scheme for the input clock of the AT84AD001 Dual 8-bit 1Gsps ADC in single-ended mode?
TS8388B 8-bit 1Gsps ADC Analog input Terminations	What are the recommended termination schemes for the analog input of the TS8388B 8-bit 1Gsps ADC?
TS83102G0B 10-bit 2Gsps ADC clock	What is the recommended configuration to drive the TS83102G0B 10-bit 2Gsps ADC clock?
Output levels	What are the output levels that can be obtained with the e2v-grenoble devices?
ESD protections	What kind of ESD tests have you performed on your devices?
Output Level Setting	What is the proper voltage to apply to the 10-bit 2Gsps ADC to obtain ECL output level?
AGND pins for TS86101G2 MUXDAC	Do the 2 AGND pins (A2 and A15) located in the digital section of the MUXDAC need to be connected?
VEETH and VCCTH	What do VEETH and VCCTH refer to in the device pinout?
AT84AD001B, AT84AD004 Dual 8-bit ADC Vtestl and VtestQ Signals	What do I have to do with Vtestl and VtestQ signals?
Interfacing the Dual 8-bit 1Gsps ADC with the 8-bit 1:4/1:8 DMUX	How to reduce the data output speed of the Dual 8-bit 1Gsps ADC by 1:4 or 1:8 ratio?
AT84CS001 Unused inputs and outputs	What do I have to do with the unused inputs and outputs of the AT84CS001 1:2/4 10-bit 2.2 Gsps DMUX?

Board implementation

TS86101G2B AGND and DGND Ground Planes	How do I have to connect the A2 and A15 AGND pins of the TS86101G2B 4:1 10-bit 1.2 Gsps DAC?
High speed ADC board ground planes	Do I have separate the digital and analog ground planes on the board integrating a high speed e2v ADC ?
TP-101 Connection to AT84AD001-EB, AT84AD004-EB Dual 8-bit ADC Evaluation Boards	How is the TP-101 device connected to AT84AD001-EB, AT84AD004-EB evaluation boards?
Decoupling Capacitors	How do I have to proceed to implement the decoupling capacitors on a board designed with e2v-Grenoble device?
Minimum number of power supply decoupling capacitors required	What is the minimum number of decoupling capacitors required for e2v Broadband Data Conversion devices?
Jumper Settings for the TSEV83102G0BGL 10-bit 2Gsps ADC Evaluation board	What do the different jumper settings correspond to in the TSEV83102G0BGL 10-bit 2Gsps ADC Evaluation board?
Analog and digital -5V power supplies	Do I have to separate the analog and digital -5V power supplies (VEE and DVEE respectively) at the board level for the TS8308500 8-bit 500Msps, TS8388B 8-bit 1Gsps and TS83102G0B 10-bit 2Gsps ADCs?
AGND pins for TS86101G2 MUXDAC	Do the 2 AGND pins (A2 and A15) located in the digital section of the MUXDAC need to be connected?

General

Power Dissipation

Is the operating frequency a factor in calculating the power dissipation?

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